Sciweavers

15485 search results - page 2481 / 3097
» Computing Optimal Subsets
Sort
View
FPGA
1997
ACM
149views FPGA» more  FPGA 1997»
15 years 11 months ago
Signal Processing at 250 MHz Using High-Performance FPGA's
This paper describes an application in high-performance signal processing using reconfigurable computing engines: a 250 MHz cross-correlator for radio astronomy. Experimental resu...
Brian Von Herzen
CHI
1996
ACM
15 years 11 months ago
Using Small Screen Space More Efficiently
: This paper describes techniques for maximizing the efficient use of small screen space by combining delayed response with semi-transparency of control objects ("widgets"...
Tomonari Kamba, Shawn A. Elson, Terry Harpold, Tim...
DAC
1996
ACM
15 years 11 months ago
Using Register-Transfer Paths in Code Generation for Heterogeneous Memory-Register Architectures
In this paper we address the problem of code generation for basic blocks in heterogeneous memory-register DSP processors. We propose a new a technique, based on register-transfer ...
Guido Araujo, Sharad Malik, Mike Tien-Chien Lee
DAC
1996
ACM
15 years 11 months ago
A Boolean Approach to Performance-Directed Technology Mapping for LUT-Based FPGA Designs
Abstract -- This paper presents a novel, Boolean approach to LUTbased FPGA technology mapping targeting high performance. As the core of the approach, we have developed a powerful ...
Christian Legl, Bernd Wurth, Klaus Eckl
JSSPP
1997
Springer
15 years 11 months ago
An Experimental Evaluation of Processor Pool-Based Scheduling for Shared-Memory NUMA Multiprocessors
In this paper we describe the design, implementation and experimental evaluation of a technique for operating system schedulers called processor pool-based scheduling [51]. Our tec...
Tim Brecht
« Prev « First page 2481 / 3097 Last » Next »