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CSREAESA
2004
15 years 8 months ago
An Energy-Aware Synthesis Methodology for OS-Driven Multi-Process Embedded Software
The growing software content in various battery-driven embedded systems has led to significant interest in technologies for energy-efficient embedded software. While lowenergy sof...
Tat Kee Tan, Anand Raghunathan, Niraj K. Jha
DLOG
2006
15 years 8 months ago
Model checking the basic modalities of CTL with Description Logic
Abstract. Model checking is a fully automated technique for determining whether the behaviour of a finite-state reactive system satisfies a temporal logic specification. Despite th...
Shoham Ben-David, Richard J. Trefler, Grant E. Wed...
GRAPHICSINTERFACE
2004
15 years 8 months ago
A Hybrid Hardware-Accelerated Algorithm for High Quality Rendering of Visual Hulls
In this paper, a novel hybrid algorithm is presented for the fast construction and high-quality rendering of visual hulls. We combine the strengths of two complementary hardware-a...
Ming Li, Marcus A. Magnor, Hans-Peter Seidel
ERSA
2006
115views Hardware» more  ERSA 2006»
15 years 8 months ago
Reconfigurable Acceleration of Robust Frequency-Domain Echo Cancellation
Acoustic echo control is of vital interest for hands-free operation of telecommunications equipment. An important property of an acoustic echo controller is its capability to hand...
Chun Hok Ho, Ka Fai Cedric Yiu, Jiaquan Huo, Sven ...
ERSA
2006
119views Hardware» more  ERSA 2006»
15 years 8 months ago
Exploiting Hierarchical Configuration to Improve Run-Time MPSoC Task Assignment
Run-time assignment of a set of communicating tasks onto a heterogeneous multiprocessor system-on-chip (MPSoC) platform is a challenging task. Having FPGA fabric tiles in such MPS...
Vincent Nollet, Prabhat Avasare, Diederik Verkest,...