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DAC
1998
ACM
15 years 10 months ago
Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Ganesh Lakshminarayana, Niraj K. Jha
MFCS
1998
Springer
15 years 10 months ago
Facial Circuits of Planar Graphs and Context-Free Languages
It is known that a language is context-free iff it is the set of borders of the trees of recognizable set, where the border of a (labelled) tree is the word consisting of its leaf ...
Bruno Courcelle, Denis Lapoire
DAC
1997
ACM
15 years 10 months ago
Toward Formalizing a Validation Methodology Using Simulation Coverage
The biggest obstacle in the formal verification of large designs is their very large state spaces, which cannot be handled even by techniques such as implicit state space travers...
Aarti Gupta, Sharad Malik, Pranav Ashar
DAC
1997
ACM
15 years 10 months ago
More Practical Bounded-Skew Clock Routing
: Academic clock routing research results has often had limited impact on industry practice, since such practical considerations as hierarchical buffering, rise-time and overshoot ...
Andrew B. Kahng, Chung-Wen Albert Tsao
PPOPP
1997
ACM
15 years 10 months ago
Performance Implications of Communication Mechanisms in All-Software Global Address Space Systems
Global addressing of shared data simplifies parallel programming and complements message passing models commonly found in distributed memory machines. A number of programming sys...
Beng-Hong Lim, Chi-Chao Chang, Grzegorz Czajkowski...
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