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ACSAC
2007
IEEE
16 years 24 days ago
Spector: Automatically Analyzing Shell Code
Detecting the presence of buffer overflow attacks in network messages has been a major focus. Only knowing whether a message contains an attack, however, is not always enough to m...
Kevin Borders, Atul Prakash, Mark Zielinski
APSEC
2007
IEEE
16 years 24 days ago
Requirements Engineering for Reactive Systems: Coloured Petri Nets for an Elevator Controller
This paper presents a model-based approach to requirements engineering for reactive systems; we use an elevator controller as case study. We identify and justify two key propertie...
João M. Fernandes, Jens Bæk Jø...
CODES
2007
IEEE
16 years 24 days ago
Embedded software development on top of transaction-level models
Early embedded SW development with transaction-level models has been broadly promoted to improve SoC design productivity. But the proposed APIs only provide low-level read/write o...
Wolfgang Klingauf, Robert Günzel, Christian S...
FCCM
2007
IEEE
108views VLSI» more  FCCM 2007»
16 years 23 days ago
Configurable Transactional Memory
Programming efficiency of heterogeneous concurrent systems is limited by the use of lock-based synchronization mechanisms. Transactional memories can greatly improve the programmi...
Christoforos Kachris, Chidamber Kulkarni
FDL
2007
IEEE
16 years 23 days ago
Modelling Alternatives for Cycle Approximate Bus TLMs
Transaction level models (TLMs) can be constructed at t levels of abstraction, denoted as untimed (UT), cycle-approximate (CX), and cycle accurate (CA) in this paper. The choice o...
Martin Radetzki, Rauf Salimi Khaligh
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