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ICS
2004
Tsinghua U.
15 years 11 months ago
Evaluating support for global address space languages on the Cray X1
The Cray X1 was recently introduced as the first in a new line of parallel systems to combine high-bandwidth vector processing with an MPP system architecture. Alongside capabili...
Christian Bell, Wei-Yu Chen, Dan Bonachea, Katheri...
ICS
2004
Tsinghua U.
15 years 11 months ago
CQoS: a framework for enabling QoS in shared caches of CMP platforms
Cache hierarchies have been traditionally designed for usage by a single application, thread or core. As multi-threaded (MT) and multi-core (CMP) platform architectures emerge and...
Ravi R. Iyer
ICALP
2003
Springer
15 years 11 months ago
Anycasting in Adversarial Systems: Routing and Admission Control
Abstract. In this paper we consider the problem of routing packets in dynamically changing networks, using the anycast mode. In anycasting, a packet may have a set of destinations ...
Baruch Awerbuch, André Brinkmann, Christian...
ICS
2003
Tsinghua U.
15 years 11 months ago
PowerHerd: dynamic satisfaction of peak power constraints in interconnection networks
Power consumption is a critical issue in interconnection network design, driven by power-related design constraints, such as thermal and power delivery design. Usually, off-line w...
Li Shang, Li-Shiuan Peh, Niraj K. Jha

Publication
351views
17 years 6 months ago
Synthesizable High Level Hardware Descriptions
Modern hardware description languages support code-generation constructs like generate/endgenerate in Verilog. These constructs are intended to describe regular or parameterized ha...
Jennifer Gillenwater, Gregory Malecha, Cherif Sala...
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