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CDES
2008
90views Hardware» more  CDES 2008»
15 years 8 months ago
Nanocompilation for the Cell Matrix Architecture
- The Cell Matrix Architecture is a massive array of dynamically self-configurable, uniformly connected, identical computational units. This architecture can enable efficient, prac...
Thomas Way, Rushikesh Katikar, Ch. Purushotham
EGH
2010
Springer
15 years 4 months ago
Architecture considerations for tracing incoherent rays
This paper proposes a massively parallel hardware architecture for efficient tracing of incoherent rays, e.g. for global illumination. The general approach is centered around hier...
Timo Aila, Tero Karras
SAC
2008
ACM
15 years 6 months ago
Publish/subscribe architecture for mobile ad hoc networks
Publish/Subscribe architectures have been widely studied and applied in wired networks. However, their deployment on mobile ad hoc networks still presents a lot of challenges. Thi...
Cristiano G. Rezende, Bruno P. S. Rocha, Antonio A...
ANCS
2009
ACM
15 years 4 months ago
EINIC: an architecture for high bandwidth network I/O on multi-core processors
This paper proposes a new server architecture EINIC (Enhanced Integrated NIC) for multi-core processors to tackle the mismatch between network speed and host computational capacit...
Guangdeng Liao, Laxmi N. Bhuyan, Danhua Guo, Steve...
SI3D
1995
ACM
15 years 10 months ago
Portals and Mirrors: Simple, Fast Evaluation of Potentially Visible Sets
We describe an approach for determining potentially visible sets in dynamic architectural models. Our scheme divides the models into cells and portals, computing a conservative es...
David P. Luebke, Chris Georges