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VLSID
2001
IEEE
98views VLSI» more  VLSID 2001»
16 years 6 months ago
Complexity Of Minimum-Delay Gate Resizing
Supratik Chakraborty, Rajeev Murgai
SBACPAD
2007
IEEE
554views Hardware» more  SBACPAD 2007»
16 years 23 days ago
Multi2Sim: A Simulation Framework to Evaluate Multicore-Multithreaded Processors
Rafael Ubal, Julio Sahuquillo, Salvador Petit, Ped...
APCSAC
2006
IEEE
16 years 17 days ago
Optimization and Evaluating of StreamYGX2 on MASA Stream Processor
Mei Wen, Nan Wu, Changqing Xun, Wei Wu, Chunyuan Z...
VLSID
2003
IEEE
109views VLSI» more  VLSID 2003»
15 years 11 months ago
Design of a high speed string matching co-processor for NLP
Vadali Srinivasa Murty, P. C. Reghu Raj, S. Raman