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IEEEPACT
2008
IEEE
16 years 1 months ago
Leveraging on-chip networks for data cache migration in chip multiprocessors
Recently, chip multiprocessors (CMPs) have arisen as the de facto design for modern high-performance processors, with increasing core counts. An important property of CMPs is that...
Noel Eisley, Li-Shiuan Peh, Li Shang
146
Voted
IEEEPACT
2008
IEEE
16 years 1 months ago
Scalable and reliable communication for hardware transactional memory
In a hardware transactional memory system with lazy versioning and lazy conflict detection, the process of transaction commit can emerge as a bottleneck. This is especially true ...
Seth H. Pugsley, Manu Awasthi, Niti Madan, Naveen ...
SP
2008
IEEE
129views Security Privacy» more  SP 2008»
16 years 1 months ago
Secure Web Browsing with the OP Web Browser
Abstract—Current web browsers are plagued with vulnerabilities, providing hackers with easy access to computer systems via browser-based attacks. Browser security efforts that re...
Chris Grier, Shuo Tang, Samuel T. King
IEEEPACT
2007
IEEE
16 years 1 months ago
CacheScouts: Fine-Grain Monitoring of Shared Caches in CMP Platforms
As multi-core architectures flourish in the marketplace, multi-application workload scenarios (such as server consolidation) are growing rapidly. When running multiple application...
Li Zhao, Ravi R. Iyer, Ramesh Illikkal, Jaideep Mo...
IMA
2007
Springer
132views Cryptology» more  IMA 2007»
16 years 26 days ago
New Branch Prediction Vulnerabilities in OpenSSL and Necessary Software Countermeasures
Abstract. Software based side-channel attacks allow an unprivileged spy process to extract secret information from a victim (cryptosystem) process by exploiting some indirect leaka...
Onur Aciiçmez, Shay Gueron, Jean-Pierre Sei...
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