Compare CMOS Logic with Pass-Transistor Logic, a question was raised in our mind: "Does any rule exist that contains all good?" This paper reveals novel logic synthesis ...
While some leakage power reduction techniques require modification of process technology achieving savings at the fabrication stage, others are based on circuit-level optimization...
David Duarte, Yuh-Fang Tsai, Narayanan Vijaykrishn...
One of the major roadblocks in reduction of library generation cycle time is the layout generation phase. The two methods of doing automatic layout generation are synthesis and mig...
Interconnection networks in Systems-On-Chip begin to have a non-negligible impact on the power consumption of a whole system. This is because of increasing inter-wire capacitances...
Low standby power dissipation is the primary need for most of the wireless applications for prolonged battery life. Traditionally ASIC solutions currently address either high densi...