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VLSID
2002
IEEE
116views VLSI» more  VLSID 2002»
16 years 7 months ago
Prioritized Prime Implicant Patterns Puzzle for Novel Logic Synthesis and Optimization
Compare CMOS Logic with Pass-Transistor Logic, a question was raised in our mind: "Does any rule exist that contains all good?" This paper reveals novel logic synthesis ...
Kuo-Hsing Cheng, Shun-Wen Cheng
VLSID
2002
IEEE
122views VLSI» more  VLSID 2002»
16 years 7 months ago
Evaluating Run-Time Techniques for Leakage Power Reduction
While some leakage power reduction techniques require modification of process technology achieving savings at the fabrication stage, others are based on circuit-level optimization...
David Duarte, Yuh-Fang Tsai, Narayanan Vijaykrishn...
VLSID
2002
IEEE
119views VLSI» more  VLSID 2002»
16 years 7 months ago
Reducing Library Development Cycle Time through an Optimum Layout Create Flow
One of the major roadblocks in reduction of library generation cycle time is the layout generation phase. The two methods of doing automatic layout generation are synthesis and mig...
Rituparna Mandal, Dibyendu Goswami, Arup Dash
VLSID
2002
IEEE
138views VLSI» more  VLSID 2002»
16 years 7 months ago
ETAM++: Extended Transition Activity Measure for Low Power Address Bus Designs
Interconnection networks in Systems-On-Chip begin to have a non-negligible impact on the power consumption of a whole system. This is because of increasing inter-wire capacitances...
Haris Lekatsas, Jörg Henkel
VLSID
2002
IEEE
92views VLSI» more  VLSID 2002»
16 years 7 months ago
Low Power Solution for Wireless Applications
Low standby power dissipation is the primary need for most of the wireless applications for prolonged battery life. Traditionally ASIC solutions currently address either high densi...
Sornavalli Ramanathan, Rituparna Mandal
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