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VLSID
2006
IEEE
129views VLSI» more  VLSID 2006»
16 years 7 months ago
Modeling and Reduction of Gate Leakage during Behavioral Synthesis of NanoCMOS Circuits
For a nanoCMOS of sub-65nm technology, where the gate oxide (SiO2) thickness is very low, the gate leakage is one of the major components of power dissipation. In this paper, we pr...
Saraju P. Mohanty, Elias Kougianos
VLSID
2006
IEEE
156views VLSI» more  VLSID 2006»
16 years 7 months ago
SEAT-LA: A Soft Error Analysis Tool for Combinational Logic
Radiation induced soft errors in combinational logic is expected to become as important as directly induced errors on state elements. Consequently, it has become important to deve...
Jungsub Kim, Mary Jane Irwin, Narayanan Vijaykrish...
VLSID
2005
IEEE
147views VLSI» more  VLSID 2005»
16 years 7 months ago
Memory-Centric Motion Estimator
In the streaming video processing domain, the only way to meet strict performance and quality requirements and yet to provide the area- and power-wise optimal platform is to apply...
Aleksandar Beric, Ramanathan Sethuraman, Jef L. va...
VLSID
2005
IEEE
82views VLSI» more  VLSID 2005»
16 years 7 months ago
Dual-Edge Triggered Static Pulsed Flip-Flops
Two Simple structures of low-power Dual-edge triggered Static Pulsed Flip-Flops (DSPFF) are presented in this paper. They are composed of a dualedge pulse generator and a static f...
Aliakbar Ghadiri, Hamid Mahmoodi-Meimand
VLSID
2005
IEEE
87views VLSI» more  VLSID 2005»
16 years 7 months ago
Synthesis of Asynchronous Circuits Using Early Data Validity
Interest in asynchronous circuit design is increasing due to its promise of efficient designs. The quiescent nature of asynchronous circuits allows them to remain in a stable stat...
Nitin Gupta, Doug A. Edwards
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