ion Refinement by Controllability and Cooperativeness Analysis Freddy Y.C. Mang and Pei-Hsin Ho Advanced Technology Group, Synopsys, Inc. {fmang, pho}@synopsys.com nt a new abstrac...
As across-chip interconnect delays can exceed a clock cycle, wire pipelining becomes essential in high performance designs. Although it allows higher clock frequencies, it may cha...
Code compression has been shown to be an effective technique to reduce code size in memory constrained embedded systems. It has also been used as a way to increase cache hit ratio...
Eduardo Wanderley Netto, Rodolfo Azevedo, Paulo Ce...
Scratch-pad memories (SPMs) enable fast access to time-critical data. While prior research studied both static and dynamic SPM management strategies, not being able to keep all ho...
Ozcan Ozturk, Mahmut T. Kandemir, I. Demirkiran, G...
A modular synthesis flow is essential for a scalable and hierarchical design methodology. This paper considers a particular modular flow where each module has interface methods an...