11061 search results - page 1782 / 2213 » Computer Architecture |
175
click to vote
DAC
2003
ACM
16 years 7 months ago
2003
ACM
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous designs, this requires retiming and pipel...
206
click to vote
DAC
2003
ACM
16 years 7 months ago
2003
ACM
As power consumption of the clock tree in modern VLSI designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing cl...
167
click to vote
DAC
2003
ACM
16 years 7 months ago
2003
ACM
Bounded Model Checking (BMC) based on Boolean Satisfiability (SAT) procedures has recently gained popularity as an alternative to BDD-based model checking techniques for finding b...
167
click to vote
DAC
2003
ACM
16 years 7 months ago
2003
ACM
Binary Decision Diagrams (BDDs) often fail to exploit sharing between Boolean functions that differ only in their support variables. In a memory circuit, for example, the function...
178
click to vote
DAC
2003
ACM
16 years 7 months ago
2003
ACM
This paper describes a case study and design flow of a secure embedded system called ThumbPod, which uses cryptographic and biometric signal processing acceleration. It presents t...