11061 search results - page 1765 / 2213 » Computer Architecture |
137
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
Due to skewed scaling of interconnect delay and cell delay with technology scaling, modern VLSI timing closure requires use of extensive buffer insertion. Inserting a large number...
191
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
Soft errors, once only of concern in memories, are beginning to affect logic as well. Determining the soft error rate (SER) of a combinational circuit involves three main masking ...
152
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DAC
2007
ACM
16 years 7 months ago
2007
ACM
In this paper we address the the growing issue of junction tunneling leakage (Ijunc) at the circuit level. Specifically, we develop a fast approach to analyze the state-dependent ...
166
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DAC
2007
ACM
16 years 7 months ago
2007
ACM
High efficiency low voltage DC-DC conversion is a key enabler to the design of power-efficient integrated circuits. Typically a star configuration of the DC-DC converters, where o...
160
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DAC
2007
ACM
16 years 7 months ago
2007
ACM
The number and magnitude of process variation sources are increasing as we scale further into the nano regime. Today's most successful response surface methods limit us to lo...