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1999
Tsinghua U.
15 years 11 months ago
Classifying load and store instructions for memory renaming
Memory operations remain a significant bottleneck in dynamically scheduled pipelined processors, due in part to the inability to statically determine the existence of memory addr...
Glenn Reinman, Brad Calder, Dean M. Tullsen, Gary ...
HICSS
1998
IEEE
176views Biometrics» more  HICSS 1998»
15 years 11 months ago
Intelligent System for Reading Handwriting on Forms
The National Institute of Standards and Technology (NIST) has developed a form-based handprint recognition system for reading information written on forms. This public domain soft...
Michael D. Garris
HPCA
1998
IEEE
15 years 11 months ago
Speculative Versioning Cache
Dependences among loads and stores whose addresses are unknown hinder the extraction of instruction level parallelism during the execution of a sequential program. Such ambiguous ...
Sridhar Gopal, T. N. Vijaykumar, James E. Smith, G...
HPDC
1998
IEEE
15 years 11 months ago
Towards a Hierarchical Scheduling System for Distributed WWW Server Clusters
In this paper we present a model for dynamically scheduling HTTP requests across clusters of servers, optimizing the use of client resources as well as the scattered server nodes....
Daniel Andresen, Timothy McCune
ICPADS
1998
IEEE
15 years 11 months ago
Probability Based Replacement Algorithm for WWW Server Arrays
This paper describes a scalable Web server array architecture which uses a caching policy called Probability Based Replacement (PBR) algorithm [5, 6]. The server array consists of...
K. H. Yeung, K. W. Suen
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