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VLSID
2004
IEEE
170views VLSI» more  VLSID 2004»
16 years 7 months ago
On-chip networks: A scalable, communication-centric embedded system design paradigm
As chip complexity grows, design productivity boost is expected from reuse of large parts and blocks of previous designs with the design effort largely invested into the new parts...
Jörg Henkel, Srimat T. Chakradhar, Wayne Wolf
VLSID
2002
IEEE
159views VLSI» more  VLSID 2002»
16 years 7 months ago
Challenges in the Design of a Scalable Data-Acquisition and Processing System-on-Silicon
Increasing complexity of the functionalities and the resultant growth in number of gates integrated in a chip coupled with shrinking geometries and short cycle time requirements br...
Karanth Shankaranarayana, Soujanna Sarkar, R. Venk...
VLSID
2001
IEEE
184views VLSI» more  VLSID 2001»
16 years 7 months ago
Battery Life Estimation of Mobile Embedded Systems
Since battery life directly impacts the extent and duration of mobility, one of the key considerations in the design of a mobile embedded system should be to maximize the energy d...
Debashis Panigrahi, Sujit Dey, Ramesh R. Rao, Kani...
FC
1997
Springer
86views Cryptology» more  FC 1997»
15 years 11 months ago
The SPEED Cipher
Abstract. SPEED is a private key block cipher. It supports three variable parameters: (1) data length — the length of a plaintext/ciphertext of SPEED can be 64, 128 or 256 bits. ...
Yuliang Zheng
ISCA
2010
IEEE
214views Hardware» more  ISCA 2010»
15 years 9 months ago
Translation caching: skip, don't walk (the page table)
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...
Thomas W. Barr, Alan L. Cox, Scott Rixner
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