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FPL
2007
Springer
97views Hardware» more  FPL 2007»
15 years 11 months ago
An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems
Recently, there is a surge of interests in using FPGAs for computer architecture research including applications from emulating and analyzing a new platform to accelerating microa...
Taeweon Suh, Shih-Lien Lu, Hsien-Hsin S. Lee
CISS
2007
IEEE
15 years 9 months ago
Quantum Switching Networks with Classical Routing
— Flexible distribution of data in the form of quantum bits (qubits) amongst spatially separated entities is an essential component of envisioned scalable quantum computing archi...
Rahul Ratan, Manish Kumar Shukla, A. Yavuz Oru&cce...
174
Voted
AAAI
2010
15 years 8 months ago
Evolving Compiler Heuristics to Manage Communication and Contention
As computer architectures become increasingly complex, hand-tuning compiler heuristics becomes increasingly tedious and time consuming for compiler developers. This paper presents...
Matthew E. Taylor, Katherine E. Coons, Behnam Roba...
CRIWG
2004
15 years 8 months ago
A Tailorable Collaborative Learning System That Combines OGSA Grid Services and IMS-LD Scripting
This paper presents Gridcole, a new collaborative learning system that can be easily tailored by educators in order to support their own CSCL scenarios, using computing services pr...
Miguel L. Bote-Lorenzo, Luis M. Vaquero-Gonz&aacut...
203
Voted
WSC
1997
15 years 8 months ago
Efficient Instruction Cache Simulation and Execution Profiling with a Threaded-Code Interpreter
We present an extension to an existing SPARC V8 instruction set simulator, SimICS, to support accurate profiling of branches and instruction cache misses. SimICS had previously su...
Peter S. Magnusson
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