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171
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HPCA
2004
IEEE
16 years 7 months ago
2004
IEEE
For highest performance, a modern microprocessor must be able to determine if an instruction is ready in the same cycle in which it is to be selected for execution. This creates a...
150
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HPCA
2004
IEEE
16 years 7 months ago
2004
IEEE
Low disk throughput is one of the main impediments to improving the performance of data-intensive servers. In this paper, we propose two management techniques for the disk control...
204
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HPCA
2004
IEEE
16 years 7 months ago
2004
IEEE
Using alternative cache indexing/hashing functions is a popular technique to reduce conflict misses by achieving a more uniform cache access distribution across the sets in the ca...
204
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HPCA
2004
IEEE
16 years 7 months ago
2004
IEEE
Modern microprocessors adopt speculative scheduling techniques where instructions are scheduled several clock cycles before they actually execute. Due to this scheduling delay, sc...
209
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HPCA
2004
IEEE
16 years 7 months ago
2004
IEEE
Data communications between producer instructions and consumer instructions through memory incur extra delays that degrade processor performance. In this paper, we introduce a new...