11061 search results - page 1387 / 2213 » Computer Architecture |
202
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VLSID
2002
IEEE
16 years 8 months ago
2002
IEEE
We present an efficient implementation of an approximate balanced truncation model reduction technique for general large-scale RLC systems, described by a statespace model where t...
178
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HPCA
2008
IEEE
16 years 8 months ago
2008
IEEE
This paper presents FlexiTaint, a hardware accelerator for dynamic taint propagation. FlexiTaint is implemented as an in-order addition to the back-end of the processor pipeline, ...
162
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HPCA
2006
IEEE
16 years 8 months ago
2006
IEEE
The increasing demand for reliable computers has led to proposals for hardware-assisted rollback of memory state. Such approach promises major reductions in Mean Time To Repair (M...
188
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HPCA
2004
IEEE
16 years 8 months ago
2004
IEEE
Branch misprediction penalty consists of two components: the time wasted on mis-speculative execution until the mispredicted branch is resolved and the time to restart the pipelin...
215
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HPCA
2004
IEEE
16 years 8 months ago
2004
IEEE
Reducing energy consumption has become one of the major challenges in designing future computing systems. This paper proposes a novel idea of using program counters to predict I/O...