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VLSID
2002
IEEE
95views VLSI» more  VLSID 2002»
16 years 8 months ago
Design of an On-Chip Test Pattern Generator without Prohibited Pattern Set (PPS)
| This paper reports the design of a Test Pattern Generator (TPG) for VLSI circuits. The onchip TPG is so designed that it generates test patterns while avoiding generation of a gi...
Niloy Ganguly, Biplab K. Sikdar, Parimal Pal Chaud...
VLSID
2002
IEEE
106views VLSI» more  VLSID 2002»
16 years 8 months ago
SWASAD: An ASIC Design for High Speed DNA Sequence Matching
This paper presents the Smith and Waterman Algorithm-Specific ASIC Design (SWASAD) project. This is a hardware solution that implements the S&W algorithm.. The SWASAD is an imp...
Tony Han, Sri Parameswaran
199
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VLSID
2002
IEEE
74views VLSI» more  VLSID 2002»
16 years 8 months ago
Interconnect Energy Dissipation in High-Speed ULSI Circuits
- This work presents accurate closed-form expressions for the interconnect energy dissipation in high-speed ULSI circuits. Unlike previous works, the energy is calculated using an ...
Payam Heydari, Massoud Pedram
185
Voted
VLSID
2002
IEEE
97views VLSI» more  VLSID 2002»
16 years 8 months ago
Multiple Faults: Modeling, Simulation and Test
We give an algorithm to model any given multiple stuck-at fault as a single stuck-at fault. The procedure requires insertion of at most ? ? ? modeling gates, when the multiplicity...
Yong Chang Kim, Vishwani D. Agrawal, Kewal K. Salu...
VLSID
2002
IEEE
152views VLSI» more  VLSID 2002»
16 years 8 months ago
Verification of an Industrial CC-NUMA Server
Directed test program-based verification or formal verification methods are usually quite ineffective on large cachecoherent, non-uniform memory access (CC-NUMA) multiprocessors b...
Rajarshi Mukherjee, Yozo Nakayama, Toshiya Mima
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