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VLSID
2004
IEEE
111views VLSI» more  VLSID 2004»
16 years 8 months ago
On Buffering Schemes for Long Multi-Layer Nets
We consider the problem of minimizing the delay in signal transmission over point-to-point connections across multiple metal layers in a VLSI circuit. We present an exact solution...
Vani Prasad, Madhav P. Desai
VLSID
2004
IEEE
181views VLSI» more  VLSID 2004»
16 years 8 months ago
Real Time Dynamic Voltage Scaling For Embedded Systems
This paper presents a very efficient and versatile method to handle Dynamic Voltage Scaling for minimizing energy consumption in an embedded system processor while maintaining rea...
Venkat Rao, Gaurav Singhal, Anshul Kumar
VLSID
2004
IEEE
91views VLSI» more  VLSID 2004»
16 years 8 months ago
Program Slicing for ATPG-Based Property Checking
This paper presents a novel technique for abstracting designs in order to increase the efficiency of formal property checking. Bounded Model Checking (BMC), using Satisfiability (...
Vivekananda M. Vedula, Whitney J. Townsend, Jacob ...
VLSID
2004
IEEE
126views VLSI» more  VLSID 2004»
16 years 8 months ago
Design Considerations for Next Generation Wireless Power-Aware Microsensor Nodes
In order to break the 100 W average power barrier of a wireless microsensor node, aggressive design methodologies need to be developed. Dynamic voltage scaling should be more aggr...
David D. Wentzloff, Benton H. Calhoun, Rex Min, Al...
VLSID
2004
IEEE
128views VLSI» more  VLSID 2004»
16 years 8 months ago
A Compact Low-Power Buffer Amplifier with Dynamic Bias Control Technique
This work presents a novel dynamic bias control technique to verify the circuit performance of the lowpower rail-to-rail input/output buffer amplifier, which can be operating in s...
Chih-Jen Yen, Wen-Yaw Chung, Mely Chen Chi
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