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188
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VLSID
2007
IEEE
16 years 8 months ago
2007
IEEE
Accurate electrical masking modeling represents a significant challenge in soft error rate analysis for combinational logic circuits. In this paper, we use table lookup MOSFET mode...
162
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VLSID
2007
IEEE
16 years 8 months ago
2007
IEEE
Abstract-- This paper presents the results obtained from an experimental study of the impact of modern process technologies on the electrical parameters of interconnects. Variation...
195
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VLSID
2006
IEEE
16 years 8 months ago
2006
IEEE
In the multi-GHz frequency domain, inductive and capacitive parasitics of interconnects can cause significant 'ringing' or overdamping, which may lead to false switching...
195
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VLSID
2006
IEEE
16 years 8 months ago
2006
IEEE
This article describes a standard cell based novel implementation of a low-power Viterbi Decoder (VD) targeted for the IEEE 802.11a Wireless LAN system. Multiple clock rates have ...
204
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VLSID
2006
IEEE
16 years 8 months ago
2006
IEEE
Serial links in network on chip provide advantages in terms of reduced wiring area, reduced switch complexity and power. However, serial links offer lower bandwidth in comparison ...