11061 search results - page 1309 / 2213 » Computer Architecture |
198
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DAC
2000
ACM
16 years 8 months ago
2000
ACM
This paper derives a methodology for developing accurate convex delay models to be used for transistor sizing. A new rich class of convex functions to model gate delay is presente...
213
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DAC
2000
ACM
16 years 8 months ago
2000
ACM
Variable ordering for BDDs has been extensively investigated. Recently, sampling based ordering techniques have been proposed to overcome problems with structure based static orde...
153
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DAC
2000
ACM
16 years 8 months ago
2000
ACM
Due to the large die sizes and tight relative clock skew margins, the impact of interconnect manufacturing variations on the clock skew in today's gigahertz microprocessors c...
215
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DAC
2000
ACM
16 years 8 months ago
2000
ACM
We recently introduced symbolic timing simulation (STS) using data-dependent delays as a tool for verifying the timing of fullcustom transistor-level circuit designs, and for the ...
155
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DAC
2000
ACM
16 years 8 months ago
2000
ACM
A dynamic noise model is developed and applied to analyze the noise immunity of precharge-evaluate circuits. Considering that the primary source of noise-injection in the circuit ...