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DAC
1998
ACM
16 years 7 months ago
Watermarking Techniques for Intellectual Property Protection
Digital system designs are the product of valuable effort and knowhow. Their embodiments, from software and HDL program down to device-level netlist and mask data, represent caref...
Andrew B. Kahng, John Lach, William H. Mangione-Sm...
DAC
2000
ACM
16 years 7 months ago
Forensic engineering techniques for VLSI CAD tools
The proliferation of the Internet has a ected the business model of almost all semiconductor and VLSI CAD companies that rely on intellectual property (IP) as their main source of...
Darko Kirovski, David T. Liu, Jennifer L. Wong, Mi...
DAC
2005
ACM
16 years 7 months ago
An effective power mode transition technique in MTCMOS circuits
- The large magnitude of supply/ground bounces, which arise from power mode transitions in power gating structures, may cause spurious transitions in a circuit. This can result in ...
Afshin Abdollahi, Farzan Fallah, Massoud Pedram
DAC
2006
ACM
16 years 7 months ago
Self-calibration technique for reduction of hold failures in low-power nano-scaled SRAM
Increasing source voltage (Source-Biasing) is an efficient technique for reducing gate and sub-threshold leakage of SRAM arrays. However, due to process variation, a higher source...
Swaroop Ghosh, Saibal Mukhopadhyay, Kee-Jong Kim, ...
VLSID
2004
IEEE
135views VLSI» more  VLSID 2004»
16 years 7 months ago
Integrating Self Testability with Design Space Exploration by a Controller based Estimation Technique
Recent research for testable designs has focussed on inserting test structures by re-arranging an Register-TransferLevel (RTL) data path generated from a behavioural description t...
M. S. Gaur, Mark Zwolinski