We propose a method for power optimization that considers glitch reduction by gate sizing based on the statistical estimation of glitch transitions. Our method reduces not only th...
Covering problems arise in many areas of electronic design automation such as logic minimization and technology mapping. An exact solution can critically impact both size and perf...
Xiao Yu Li, Matthias F. M. Stallmann, Franc Brglez
Interconnect structures including dielectrics can be modeled by an integral equation method using volume currents and surface charges for the conductors, and volume polarization c...
Luca Daniel, Alberto L. Sangiovanni-Vincentelli, J...
Abstract—ITPN-PerfBound is a graphical tool for the modeling and performance bound analysis of Interval Time Petri Nets (ITPN), that has been developed within the DrawNET modelin...
In this paper, we concentrate on the design of a new whole-sensitive robot arm enabling torque measurement in each joint by means of developed optical torque sensors. When the con...