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SAC
2010
ACM
15 years 6 months ago
Efficient mapping and voltage islanding technique for energy minimization in NoC under design constraints
Voltage islanding technique in Network-on-Chip (NoC) can significantly reduce the computational energy consumption by scaling down the voltage levels of the processing elements (P...
Pavel Ghosh, Arunabha Sen
COCO
2009
Springer
126views Algorithms» more  COCO 2009»
16 years 1 months ago
New Results in the Simultaneous Message Passing Model via Information Theoretic Techniques
—Consider the following Simultaneous Message Passing (SMP) model for computing a relation f ⊆ X ×Y ×Z. In this model Alice, on input x ∈ X and Bob, on input y ∈ Y, send o...
Rahul Jain, Hartmut Klauck
DATE
2005
IEEE
117views Hardware» more  DATE 2005»
16 years 9 days ago
Power Saving Techniques for Wireless LANs
Fast wireless access has rapidly become commonplace. Wireless access points and Hotspot servers are sprouting everywhere. Battery lifetime continues to be a critical issue in mobi...
Tajana Simunic
DFG
1992
Springer
15 years 10 months ago
Complexity of Boolean Functions on PRAMs - Lower Bound Techniques
Determining time necessary for computing important functions on parallel machines is one of the most important problems in complexity theory for parallel algorithms. Recently, a s...
Miroslaw Kutylowski
ACL
2008
15 years 8 months ago
Generating Research Websites Using Summarisation Techniques
We describe an application that generates web pages for research institutions by summarising terms extracted from individual researchers' publication titles. Our online demo ...
Advaith Siddharthan, Ann A. Copestake