In this work, for the first time, we present a physically based analytical threshold voltage model for omega gate silicon nanowire transistor. This model is developed for long cha...
State-of-the-art FPGA architectures have millions of gates in CLBs, Block RAMs, and Multiplier blocks which can host fairly large designs. While their physical design calls for oor...
Reduction of worst-case delay and delay uncertainty due to capacitive coupling is a still unsolved problem in physical design. We describe a routing only layout solution - swizzli...
Recent developments in embedded systems technology have opened up a vast area of research and development- the development of portable and affordable assistive devices tuned to sp...
This paper presents a new interaction technique for browsing large visual information bases in a collaborative environment. The ATELIER project deals with learning environments fo...