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DAC
2008
ACM
16 years 7 months ago
TuneFPGA: post-silicon tuning of dual-Vdd FPGAs
Modern CMOS manufacturing processes have significant variability, which necessitates guard banding to achieve reasonable yield. We study an FPGA architecture with a dual voltage s...
Stephen Bijansky, Adnan Aziz
CODES
1996
IEEE
15 years 11 months ago
A Multi-Level Transformation Approach to HW/SW Codesign: A Case Study
This reported work applies a transformational synthesis approach to hardware/software codesign. In this approach, the process of algorithm design is coupled early on with hardware...
Tommy King-Yin Cheung, Graham R. Hellestrand, Pras...
IEEEHPCS
2010
15 years 4 months ago
Using replication and checkpointing for reliable task management in computational Grids
In grid computing systems, providing fault-tolerance is required for both scientific computation and file-sharing to increase their reliability. In previous works, several mechani...
Sangho Yi, Derrick Kondo, Bongjae Kim, Geunyoung P...

Publication
767views
17 years 5 months ago
Analysis of the Increase/Decrease Algorithms for Congestion Avoidance in Computer Networks
Congestion avoidance mechanisms allow a network to operate in the optimal region of low delay and high throughput, thereby, preventing the network from becoming congested. This is ...
D. Chiu and R. Jain