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HPCA
2007
IEEE
16 years 7 months ago
A Scalable, Non-blocking Approach to Transactional Memory
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by eliminating the need for locks and their associated problems (deadlock, livelock, pr...
Hassan Chafi, Jared Casper, Brian D. Carlstrom, Au...
207
Voted
ISSS
1999
IEEE
168views Hardware» more  ISSS 1999»
15 years 11 months ago
Automatic Architectural Synthesis of VLIW and EPIC Processors
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
Shail Aditya, B. Ramakrishna Rau, Vinod Kathail
ACMICEC
2007
ACM
168views ECommerce» more  ACMICEC 2007»
15 years 10 months ago
Designing novel review ranking systems: predicting the usefulness and impact of reviews
With the rapid growth of the Internet, users' ability to publish content has created active electronic communities that provide a wealth of product information. Consumers nat...
Anindya Ghose, Panagiotis G. Ipeirotis
VLSID
2004
IEEE
107views VLSI» more  VLSID 2004»
16 years 7 months ago
Performance Analysis of Inter Cluster Communication Methods in VLIW Architecture
With increasing demands for high performance by embedded systems, especially by digital signal processing applications, embedded processors must increase available instruction lev...
Sourabh Saluja, Anshul Kumar
ICDM
2007
IEEE
101views Data Mining» more  ICDM 2007»
16 years 1 months ago
Lightweight Distributed Trust Propagation
Using mobile devices, such as smart phones, people may create and distribute different types of digital content (e.g., photos, videos). One of the problems is that digital content...
Daniele Quercia, Stephen Hailes, Licia Capra