3504 search results - page 503 / 701 » Computational Aspects of Equilibria |
161
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DAC
2009
ACM
16 years 7 months ago
2009
ACM
Logic simulation is a critical component of the design tool flow in modern hardware development efforts. It is used widely ? from high-level descriptions down to gate-level ones ?...
181
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
C++ based verification methodologies are now emerging as the preferred method for SOC design. However most of the verification involving the C++ models are simulation based. The c...
170
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DAC
2000
ACM
16 years 7 months ago
2000
ACM
In this paper we describe an area efficient power minimization scheme "Control Generated ClockingI` that saves significant amounts of power in datapath registers and clock dr...
140
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DAC
2004
ACM
16 years 7 months ago
2004
ACM
Coverage analysis is used to monitor the quality of the verification process. Reports provided by coverage tools help users identify areas in the design that have not been adequat...
164
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
In this paper we present a generic interconnect fabric for transaction level modelling tackeling three major aspects. First, a review of the bus and IO structures that we have ana...