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DAC
2008
ACM
16 years 8 months ago
Enhancing timing-driven FPGA placement for pipelined netlists
FPGA application developers often attempt to use pipelining, Cslowing and retiming to improve the performance of their designs. Unfortunately, such registered netlists present a f...
Kenneth Eguro, Scott Hauck
DAC
2007
ACM
16 years 8 months ago
The Case for Low-Power Photonic Networks on Chip
Packet-switched networks on chip (NoC) have been advocated as a natural communication mechanism among the processing cores in future chip multiprocessors (CMP). However, electroni...
Assaf Shacham, Keren Bergman, Luca P. Carloni
ISCAS
2005
IEEE
139views Hardware» more  ISCAS 2005»
16 years 16 days ago
A frequency-domain SIR maximizing time-domain equalizer for VDSL systems
In this paper we propose a semi-blind time domain equalizer (TEQ) design method that maximize SIR (signal-tointerference ratio) in frequency domain for VDSL systems. The proposed ...
Yuan-Pei Lin, Li-Han Liang, Pei-Ju Chung, See-May ...
OZCHI
2009
ACM
15 years 11 months ago
When three worlds collide: a model of the tangible interaction process
The design of Tangible Interfaces has already evolved since the first projects were developed. Frameworks and taxonomies have helped to understand the field of Tangible Interactio...
Marc Hermann, Michael Weber
EUMAS
2006
15 years 8 months ago
Self-regulating Multi-agent System for Multi-disciplinary Optimisation Process
This article presents a multi-agent method to tackle multidisciplinary optimisation, based on the notions of cooperation and self-regulation. It is focused on the preliminary airc...
Jean-Baptiste Welcomme, Marie Pierre Gleizes, Roma...