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DAC
2008
ACM
16 years 7 months ago
A framework for block-based timing sensitivity analysis
Since process and environmental variations can no longer be ignored in high-performance microprocessor designs, it is necessary to develop techniques for computing the sensitiviti...
Sanjay V. Kumar, Chandramouli V. Kashyap, Sachin S...
IPPS
2000
IEEE
15 years 11 months ago
Micro-Architectures of High Performance, Multi-User System Area Network Interface Cards
This paper examines two Network Interface Card microarchitectures that support low latency, high bandwidth userlevel message passing in multi-user environments. The two are at dif...
Boon Seong Ang, Derek Chiou, Larry Rudolph, Arvind
CORR
2010
Springer
196views Education» more  CORR 2010»
15 years 7 months ago
Low Power Reversible Parallel Binary Adder/Subtractor
In recent years, Reversible Logic is becoming more and more prominent technology having its applications in Low Power CMOS, Quantum Computing, Nanotechnology, and Optical Computin...
H. G. Rangaraju, U. Venugopal, K. N. Muralidhara, ...
SIGMOD
2012
ACM
253views Database» more  SIGMOD 2012»
13 years 9 months ago
Skew-aware automatic database partitioning in shared-nothing, parallel OLTP systems
The advent of affordable, shared-nothing computing systems portends a new class of parallel database management systems (DBMS) for on-line transaction processing (OLTP) applicatio...
Andrew Pavlo, Carlo Curino, Stanley B. Zdonik
EDOC
2002
IEEE
15 years 11 months ago
An Architecture and a Process for Implementing Distributed Collaborations
Collaborations (between objects) are increasingly being recognized as fundamental building blocks to structure object-oriented design, and they have made their way into UML. But v...
Eric Cariou, Antoine Beugnard, Jean-Marc Jé...