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ISQED
2006
IEEE
101views Hardware» more  ISQED 2006»
16 years 20 days ago
Compiler-Directed Power Density Reduction in NoC-Based Multi-Core Designs
As transistor counts keep increasing and clock frequencies rise, high power consumption is becoming one of the most important obstacles, preventing further scaling and performance...
Sri Hari Krishna Narayanan, Mahmut T. Kandemir, Oz...
AIED
2005
Springer
16 years 6 days ago
The role of learning goals in the design of ILEs: Some issues to consider
Part of the motivation behind the evolution of learning environments is the idea of providing students with individualized instructional strategies that allow them to learn as much...
Erika Martínez-Mirón, Amanda Harris,...
WETICE
2003
IEEE
15 years 12 months ago
Design and Implementation of Virtual Private Services
Large scale distributed applications such as electronic commerce and online marketplaces combine network access with multiple storage and computational elements. The distributed r...
Sotiris Ioannidis, Steven M. Bellovin, John Ioanni...
VLSID
2010
IEEE
173views VLSI» more  VLSID 2010»
15 years 10 months ago
Voltage-Frequency Planning for Thermal-Aware, Low-Power Design of Regular 3-D NoCs
Network-on-Chip combined with Globally Asynchronous Locally Synchronous paradigm is a promising architecture for easy IP integration and utilization with multiple voltage levels. ...
Mohammad Arjomand, Hamid Sarbazi-Azad
ASPDAC
2008
ACM
108views Hardware» more  ASPDAC 2008»
15 years 8 months ago
Synthesis and design of parameter extractors for low-power pre-computation-based content-addressable memory using gate-block sel
Content addressable memory (CAM) is frequently used in applications, such as lookup tables, databases, associative computing, and networking, that require high-speed searches due t...
Jui-Yuan Hsieh, Shanq-Jang Ruan