High-level synthesis (HLS) has been successfully targeted towards the digital signal processing (DSP) domain. Both application-specic integrated circuits (ASICs) and application-...
In this paper we present a set cover based approach (SCP) to multi-way partitioning for minimum delay for Look-Up Table based FPGAs. SCP minimizes the number of chip-crossings on ...
Atheoreticalframeworkisintroducedfortheperceptionofspecularsurfacegeometry.Whenanobserver moves in three-dimensional space, real scene features such as surface markings remain stat...
Abstract -- Work in progress at the University of Missouri-Rolla on hardware assists for high performance computing is presented. This research consists of a novel field programmab...
W. Eatherton, J. Kelly, T. Schiefelbein, H. Pottin...
This paper deals with verification methods based on equivalence relations between labeled transition systems. More precisely, we are concerned by two practical needs: how to effi...