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VLSID
2002
IEEE
119views VLSI» more  VLSID 2002»
16 years 7 months ago
Reducing Library Development Cycle Time through an Optimum Layout Create Flow
One of the major roadblocks in reduction of library generation cycle time is the layout generation phase. The two methods of doing automatic layout generation are synthesis and mig...
Rituparna Mandal, Dibyendu Goswami, Arup Dash
VLSID
2002
IEEE
92views VLSI» more  VLSID 2002»
16 years 7 months ago
Low Power Solution for Wireless Applications
Low standby power dissipation is the primary need for most of the wireless applications for prolonged battery life. Traditionally ASIC solutions currently address either high densi...
Sornavalli Ramanathan, Rituparna Mandal
VLSID
2002
IEEE
122views VLSI» more  VLSID 2002»
16 years 7 months ago
IEEE 1394a_2000 Physical Layer ASIC
CN4011A is IEEE 1394a_2000 standard Compliant Physical Layer ASIC. It is a 0.18um mixed-signal ASIC incorporating three analog ports, PLL, reference generator for analog along wit...
Ranjit Yashwante, Bhalchandra Jahagirdar
VLSID
2002
IEEE
87views VLSI» more  VLSID 2002»
16 years 7 months ago
Simultaneous Circuit Transformation and Routing
In this paper, we propose a new methodology to integrate circuit transformation into routing. More specifically, this paper shows an approach for performing routing and wire recon...
Hiroaki Yoshida, Motohiro Sera, Masao Kubo, Masahi...
POPL
2002
ACM
16 years 7 months ago
Predicate abstraction for software verification
e Abstraction for Software Verification Cormac Flanagan Shaz Qadeer Compaq Systems Research Center 130 Lytton Ave, Palo Alto, CA 94301 Software verification is an important and di...
Cormac Flanagan, Shaz Qadeer