5630 search results - page 791 / 1126 » Computability in Specification |
172
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DAC
2005
ACM
16 years 7 months ago
2005
ACM
In this paper we present a system level technique for mapping large, multiple-IP-block designs to channel-width constrained FPGAs. Most FPGA clustering tools [2, 3, 11] aim to red...
187
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DAC
2005
ACM
16 years 7 months ago
2005
ACM
Dynamic voltage scaling (DVS) is a well-known low power design technique that reduces the processor energy by slowing down the DVS processor and stretching the task execution time...
190
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
or Abstraction for the Functional Verification of FPGAs Guy Dupenloup, Thierry Lemeunier, Roland Mayr Altera Corporation 101 Innovation Drive San Jose, CA 95134 1-408-544-8672 {gdu...
171
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MICCAI
2007
Springer
16 years 7 months ago
2007
Springer
Abstract. An important issue in electroencephalographiy (EEG) experiments is to measure accurately the three dimensional (3D) positions of the electrodes. We propose a system where...
158
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SIGSOFT
2004
ACM
16 years 7 months ago
2004
ACM
This paper introduces declarative event patterns (DEPs) as a means to implement protocols while improving their traceability, comprehensibility, and maintainability. DEPs are desc...