A challenge facing designers of systems on chip (SoC) containing networks on chip (NoC) is to find NoC instances that balance the cost (e.g. area) and performance (e.g. latency an...
This paper addresses the prediction of timing properties of a component-based application already during the composition phase. At this stage, it is of vital importance to guarant...
Egor Bondarev, Peter H. N. de With, Michel R. V. C...
We designed and implemented a new programming language called Hierarchical Timing Language (HTL) for hard realtime systems. Critical timing constraints are specified within the la...
Arkadeb Ghosal, Alberto L. Sangiovanni-Vincentelli...
Abstract. We propose a language, called Charon, for modular specification of interacting hybrid systems. For hierarchical description of the system architecture, Charon supports bu...
Rajeev Alur, Radu Grosu, Yerang Hur, Vijay Kumar, ...
BeatBender is a computer music project that explores a new method for generating emergent rhythmic drum patterns using the subsumption architecture. Rather than explicitly coding ...