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IPPS
1999
IEEE
15 years 11 months ago
The Paderborn University BSP (PUB) Library - Design, Implementation and Performance
The Paderborn University BSP (PUB) library is a parallel C library based on the BSP model. The basic library supports buffered and unbuffered asynchronous communication between an...
Olaf Bonorden, Ben H. H. Juurlink, Ingo von Otte, ...
FPL
2010
Springer
155views Hardware» more  FPL 2010»
15 years 4 months ago
Design and Implementation of Real-Time Transactional Memory
Transactional memory is a promising, optimistic synchronization mechanism for chip-multiprocessor systems. The simplicity of atomic sections, instead of using explicit locks, is al...
Martin Schoeberl, Peter Hilber
ICUIMC
2011
ACM
14 years 10 months ago
A cross-layer design for resource allocation and congestion control in multichannel multi-hop cognitive radio networks
Efficient and fair resource allocation associated with congestion control in multi-hop cognitive radio networks (CRN) is a challenging problem. In this paper, we consider their mu...
Nguyen Van Mui, Choong Seon Hong
ASPDAC
2007
ACM
136views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Design tool solutions for mixed-signal/RF circuit design in CMOS nanometer technologies
The scaling of CMOS technology into the nanometer era enables the fabrication of highly integrated systems, which increasingly contain analog and/or RF parts. However, scaling into...
Georges G. E. Gielen
GECCO
2009
Springer
193views Optimization» more  GECCO 2009»
15 years 11 months ago
Optimization of dynamic memory managers for embedded systems using grammatical evolution
New portable consumer embedded devices must execute multimedia applications (e.g., 3D games, video players and signal processing software, etc.) that demand extensive memory acces...
José L. Risco-Martín, David Atienza,...