2 search results - page 1 / 1 » Complexity Of Minimum-Delay Gate Resizing |
118
Voted
VLSID
2001
IEEE
16 years 6 months ago
2001
IEEE
167
Voted
ICCAD
1999
IEEE
15 years 10 months ago
1999
IEEE
Typically,cell parameterssuch as the pin-to-pinintrinsicdelays, load-dependentcoe cients,andinputpin capacitanceshavedifferent values for rising and falling signals. The performan...