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» Completeness Results for Memory Logics
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ARC
2012
Springer
280views Hardware» more  ARC 2012»
14 years 1 months ago
Scalable Memory Hierarchies for Embedded Manycore Systems
As the size of FPGA devices grows following Moore’s law, it becomes possible to put a complete manycore system onto a single FPGA chip. The centralized memory hierarchy on typica...
Sen Ma, Miaoqing Huang, Eugene Cartwright, David L...
TPHOL
2009
IEEE
16 years 25 days ago
A Formalisation of Smallfoot in HOL
In this paper a general framework for separation logic inside the HOL theorem prover is presented. This framework is based on Abeparation Logic. It contains a model of an abstract,...
Thomas Tuerk
JOLLI
2006
123views more  JOLLI 2006»
15 years 6 months ago
Cut and Pay
Abstract. In this paper we study families of resource aware logics that explore resource restriction on rules; in particular, we study the use of controlled cut-rule and introduce ...
Marcelo Finger, Dov M. Gabbay
TARK
2009
Springer
16 years 22 days ago
Dynamic restriction of choices: a preliminary logical report
We study games in which the choices available to players are not fixed, and may change during the course of play. Specifically, we consider a model in which players may switch st...
Soumya Paul, Ramaswamy Ramanujam, Sunil Easaw Simo...
ISMVL
2002
IEEE
82views Hardware» more  ISMVL 2002»
15 years 11 months ago
Representations of Logic Functions Using QRMDDs
This paper considers quasi-reduced multi-valued decision diagrams with bits (QRMDD( )s) to represent twovalued logic functions. It shows relations between the numbers of nodes in ...
Shinobu Nagayama, Tsutomu Sasao, Yukihiro Iguchi, ...