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» Completeness Results for Memory Logics
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MSE
2002
IEEE
135views Hardware» more  MSE 2002»
15 years 11 months ago
The Impact of SMT/SMP Designs on Multimedia Software Engineering - A Workload Analysis Study
This paper presents the study of running several core multimedia applications on a simultaneous multithreading (SMT) architecture and derives design principles for multimedia soft...
Yen-Kuang Chen, Rainer Lienhart, Eric Debes, Matth...
ISLPED
1995
ACM
95views Hardware» more  ISLPED 1995»
15 years 9 months ago
Reducing the frequency of tag compares for low power I-cache design
In current processors, the cache controller, which contains the cache directory and other logic such as tag comparators, is active for each instruction fetch and is responsible fo...
Ramesh Panwar, David A. Rennels
ICONIP
2008
15 years 7 months ago
A Novel Approach for Hardware Based Sound Classification
Several applications would emerge from the development of efficient and robust sound classification systems able to identify the nature of non-speech sound sources. This paper prop...
Mauricio Kugler, Victor Alberto Parcianello Benso,...
ERSA
2004
129views Hardware» more  ERSA 2004»
15 years 7 months ago
A Methodology for Energy Efficient Application Synthesis Using Platform FPGAs
Platform FPGAs incorporate many different components, such as processor core(s), reconfigurable logic, memory, etc., onto a single chip. When an application is synthesized on platf...
Jingzhao Ou, Viktor K. Prasanna
ERSA
2006
100views Hardware» more  ERSA 2006»
15 years 7 months ago
Relocation and Defragmentation for Heterogeneous Reconfigurable Systems
Current FPGAs are heterogeneous partially reconfigurable architectures, consisting of several resource types, e. g., logic cells and embedded memory. By using partial reconfigurat...
Markus Koester, Heiko Kalte, Mario Porrmann