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DAC
2005
ACM
16 years 7 months ago
Multilevel full-chip routing for the X-based architecture
As technology advances into the nanometer territory, the interconnect delay has become a first-order effect on chip performance. To handle this effect, the X-architecture has been...
Tsung-Yi Ho, Chen-Feng Chang, Yao-Wen Chang, Sao-J...
DAC
2005
ACM
16 years 7 months ago
StressTest: an automatic approach to test generation via activity monitors
The challenge of verifying a modern microprocessor design is an overwhelming one: Increasingly complex micro-architectures combined with heavy time-to-market pressure have forced ...
Ilya Wagner, Valeria Bertacco, Todd M. Austin
DAC
2006
ACM
16 years 7 months ago
Fast algorithms for slew constrained minimum cost buffering
As a prevalent constraint, sharp slew rate is often required in circuit design which causes a huge demand for buffering resources. This problem requires ultra-fast buffering techn...
Shiyan Hu, Charles J. Alpert, Jiang Hu, Shrirang K...
ICML
2008
IEEE
16 years 7 months ago
Listwise approach to learning to rank: theory and algorithm
This paper aims to conduct a study on the listwise approach to learning to rank. The listwise approach learns a ranking function by taking individual lists as instances and minimi...
Fen Xia, Tie-Yan Liu, Jue Wang, Wensheng Zhang, Ha...
ICML
2005
IEEE
16 years 7 months ago
Combining model-based and instance-based learning for first order regression
T ORDER REGRESSION (EXTENDED ABSTRACT) Kurt Driessensa Saso Dzeroskib a Department of Computer Science, University of Waikato, Hamilton, New Zealand (kurtd@waikato.ac.nz) b Departm...
Kurt Driessens, Saso Dzeroski
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