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ARC
2006
Springer
82views Hardware» more  ARC 2006»
15 years 10 months ago
Hardware and a Tool Chain for ADRES
Until recently, only a compiler and a high-level simulator of the reconfigurable architecture ADRES existed. This paper focuses on the problems that needed to be solved when moving...
Bjorn De Sutter, Bingfeng Mei, Andrei Bartic, Tom ...
FMCO
2006
Springer
135views Formal Methods» more  FMCO 2006»
15 years 10 months ago
Links: Web Programming Without Tiers
Links is a programming language for web applications that generates code for all three tiers of a web application from a single source, compiling into JavaScript to run on the clie...
Ezra Cooper, Sam Lindley, Philip Wadler, Jeremy Ya...
ASPDAC
2001
ACM
185views Hardware» more  ASPDAC 2001»
15 years 10 months ago
Power optimization and management in embedded systems
Power-efficient design requires reducing power dissipation in all parts of the design and during all stages of the design process subject to constraints on the system performance ...
Massoud Pedram
CCGRID
2003
IEEE
15 years 10 months ago
Kernel Level Speculative DSM
Interprocess communication (IPC) is ubiquitous in today's computing world. One of the simplest mechanisms for IPC is shared memory. We present a system that enhances the Syst...
Cristian Tapus
ASAP
2007
IEEE
118views Hardware» more  ASAP 2007»
15 years 8 months ago
Evaluation of a Tightly Coupled ASIP / Co-Processor Architecture Used in GNSS Receivers
This paper presents the enhancement of an ASIP’s floating point performance by coupling of a co-processor and adding of special instructions. Processor hardware modifications an...
Götz Kappen, S. el Bahri, O. Priebe, Tobias G...