2583 search results - page 271 / 517 » Compiling for stream processing |
164
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TPHOL
2000
IEEE
15 years 10 months ago
2000
IEEE
The IA-64 architecture defers floating point and integer division to software. To ensure correctness and maximum efficiency, Intel provides a number of recommended algorithms which...
184
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CORR
1999
Springer
15 years 6 months ago
1999
Springer
We propose a parser for constraintlogic grammars implementing HPSG that combines the advantages of dynamic bottom-up and advanced topdown control. The parser allows the user to ap...
168
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ICASSP
2011
IEEE
14 years 10 months ago
2011
IEEE
We present a software-only implementation of an IEEE 802.11a (WiFi) receiver optimized for Intel multicore platforms. The receiver is about 50 times faster than a straightforward ...
174
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ICIP
2005
IEEE
16 years 8 months ago
2005
IEEE
This paper presents an efficient and scalable coding scheme for transmitting a stream of 3D models extracted from a video of a static scene. As in classical model-based video codi...
157
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ICIP
2005
IEEE
16 years 8 months ago
2005
IEEE
When multiple video streams are present in an ad hoc network, they share and compete for the common network resources. A rate allocation algorithm must balance the available resou...