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PLDI
2011
ACM
14 years 9 months ago
Data representation synthesis
We consider the problem of specifying combinations of data structures with complex sharing in a manner that is both declarative lts in provably correct code. In our approach, abst...
Peter Hawkins, Alex Aiken, Kathleen Fisher, Martin...
EMSOFT
2006
Springer
15 years 10 months ago
Scheduling-independent threads and exceptions in SHIM
Concurrent programming languages should be a good fit for embedded systems because they match the intrinsic parallelism of their architectures and environments. Unfortunately, typ...
Olivier Tardieu, Stephen A. Edwards
CGO
2008
IEEE
16 years 1 months ago
Parallel-stage decoupled software pipelining
In recent years, the microprocessor industry has embraced chip multiprocessors (CMPs), also known as multi-core architectures, as the dominant design paradigm. For existing and ne...
Easwaran Raman, Guilherme Ottoni, Arun Raman, Matt...
SASP
2008
IEEE
183views Hardware» more  SASP 2008»
16 years 1 months ago
Application Acceleration with the Explicitly Parallel Operations System - the EPOS Processor
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
Alexandros Papakonstantinou, Deming Chen, Wen-mei ...
ICS
2007
Tsinghua U.
16 years 23 days ago
Sensitivity analysis for automatic parallelization on multi-cores
Sensitivity Analysis (SA) is a novel compiler technique that complements, and integrates with, static automatic parallelization analysis for the cases when relevant program behavi...
Silvius Rus, Maikel Pennings, Lawrence Rauchwerger