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CGO
2007
IEEE
16 years 12 days ago
Exploiting Narrow Accelerators with Data-Centric Subgraph Mapping
The demand for high performance has driven acyclic computation accelerators into extensive use in modern embedded and desktop architectures. Accelerators that are ideal from a sof...
Amir Hormati, Nathan Clark, Scott A. Mahlke
IWPC
2002
IEEE
15 years 11 months ago
Pattern-Supported Architecture Recovery
Architectural patterns and styles represent important design decisions and thus are valuable abstractions for architecture recovery. Recognizing them is a challenge because styles...
Martin Pinzger, Harald Gall
FPL
2001
Springer
115views Hardware» more  FPL 2001»
15 years 10 months ago
Placing, Routing, and Editing Virtual FPGAs
This paper presents the benefits of using a generic FPGA tool set developed at the university of Brest for programming virtual FPGA structures. From a high level FPGA description,...
Loïc Lagadec, Dominique Lavenier, Erwan Fabia...
IPPS
1998
IEEE
15 years 10 months ago
PACE: Processor Architectures for Circuit Emulation
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
Reiner Kolla, Oliver Springauf
CVPR
2011
IEEE
15 years 2 months ago
Multi-agent event recognition in structured scenarios
We present a framework for the automatic recognition of complex multi-agent events in settings where structure is imposed by rules that agents must follow while performing activit...
Vlad Morariu, Larry Davis