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» Compiler Architectures for Heterogeneous Systems
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ETFA
2006
IEEE
16 years 13 days ago
Investigating Connector Faults in the Time-Triggered Architecture
In the context of distributed real-time systems as deployed in the avionic and the automotive domain a substantial number of system malfunctions result from connector faults. For ...
Philipp Peti, Roman Obermaisser, Harald Paulitsch
CODES
2001
IEEE
15 years 10 months ago
Compiler-directed selection of dynamic memory layouts
Compiler technology is becoming a key component in the design of embedded systems, mostly due to increasing participation of software in the design process. Meeting system-level ob...
Mahmut T. Kandemir, Ismail Kadayif
ASPLOS
2006
ACM
16 years 10 days ago
Tartan: evaluating spatial computation for whole program execution
Spatial Computing (SC) has been shown to be an energy-efficient model for implementing program kernels. In this paper we explore the feasibility of using SC for more than small k...
Mahim Mishra, Timothy J. Callahan, Tiberiu Chelcea...
LCTRTS
1999
Springer
15 years 10 months ago
Effective Exploitation of a Zero Overhead Loop Buffer
A Zero Overhead Loop Buffer (ZOLB) is an architectural feature that is commonly found in DSP processors. This buffer can be viewed as a compiler managed cache that contains a sequ...
Gang-Ryung Uh, Yuhong Wang, David B. Whalley, Sanj...
MICRO
2000
IEEE
162views Hardware» more  MICRO 2000»
15 years 10 months ago
Accurate and efficient predicate analysis with binary decision diagrams
Functionality and performance of EPIC architectural features depend on extensive compiler support. Predication, one of these features, promises to reduce control flow overhead and...
John W. Sias, Wen-mei W. Hwu, David I. August