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ISSS
1999
IEEE
168views Hardware» more  ISSS 1999»
15 years 10 months ago
Automatic Architectural Synthesis of VLIW and EPIC Processors
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
Shail Aditya, B. Ramakrishna Rau, Vinod Kathail
ISCA
2000
IEEE
134views Hardware» more  ISCA 2000»
15 years 10 months ago
Architectural support for scalable speculative parallelization in shared-memory multiprocessors
Speculative parallelization aggressively executes in parallel codes that cannot be fully parallelized by the compiler. Past proposals of hardware schemes have mostly focused on si...
Marcelo H. Cintra, José F. Martínez,...
DATE
1999
IEEE
162views Hardware» more  DATE 1999»
15 years 10 months ago
MOCSYN: Multiobjective Core-Based Single-Chip System Synthesis
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
Robert P. Dick, Niraj K. Jha
ICWE
2003
Springer
15 years 11 months ago
X-SHAAD: An XML Implementation for Hypermedia Systems Modeling through SHAAD
Abstract. In this paper we present an implementation using XML and Java (XSHAAD) based on a modular architecture of SHAAD to support a web-based Adaptive Hypermedia System. This ar...
David Mérida, Ramón Fabregat, Carlos...
DPD
2002
114views more  DPD 2002»
15 years 6 months ago
Query Decomposition for a Distributed Object-Oriented Mediator System
The mediator-wrapper approach to integrate data from heterogeneous data sources has usually been centralized in the sense that a single mediator system is placed between a number o...
Vanja Josifovski, Tore Risch