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TWC
2008
117views more  TWC 2008»
15 years 6 months ago
Achievable Rates and Fairness in Rateless Coded Relaying Schemes
Abstract--The average throughput of three decode-andforward (DF) half-duplex (DFHD) and two DF full-duplex (DFFD) rateless coded relaying schemes are studied under a peak power con...
Reza Nikjah, Norman C. Beaulieu
VLSID
2005
IEEE
82views VLSI» more  VLSID 2005»
16 years 7 months ago
Dual-Edge Triggered Static Pulsed Flip-Flops
Two Simple structures of low-power Dual-edge triggered Static Pulsed Flip-Flops (DSPFF) are presented in this paper. They are composed of a dualedge pulse generator and a static f...
Aliakbar Ghadiri, Hamid Mahmoodi-Meimand
ISCAS
2005
IEEE
144views Hardware» more  ISCAS 2005»
16 years 7 days ago
Impact of multicycled scheduling on power-area tradeoffs in behavioural synthesis
— Multicycling is a widely investigated technique for performance optimisation in behavioural synthesis. It allows an operation to execute over two or more control steps with the...
M. A. Ochoa-Montiel, Bashir M. Al-Hashimi, Peter K...
ISLPED
2010
ACM
128views Hardware» more  ISLPED 2010»
15 years 4 months ago
Rank-aware cache replacement and write buffering to improve DRAM energy efficiency
DRAM power and energy efficiency considerations are becoming increasingly important for low-power and mobile systems. Using lower power modes provided by commodity DRAM chips redu...
Ahmed M. Amin, Zeshan Chishti
ICRA
2009
IEEE
170views Robotics» more  ICRA 2009»
16 years 1 months ago
Characterization of the compact Hokuyo URG-04LX 2D laser range scanner
— This paper presents a detailed characterization of the Hokuyo URG-04LX 2D laser range finder. While the sensor specifications only provide a rough estimation of the sensor ac...
Laurent Kneip, Fabien Tâche, Gilles Caprari,...