4469 search results - page 412 / 894 » Comparing and Combining Profiles |
154
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ICCD
1995
IEEE
15 years 10 months ago
1995
IEEE
STARI is a high-speed signaling technique that uses both synchronous and self-timed circuits. To demonstrate STARI, a chip has been fabricated using the MOSIS 2 CMOS process. In a...
183
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ICS
1995
Tsinghua U.
15 years 10 months ago
1995
Tsinghua U.
Modulo scheduling is an e cient technique for exploiting instruction level parallelism in a variety of loops, resulting in high performance code but increased register requirement...
202
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RTSS
1995
IEEE
15 years 10 months ago
1995
IEEE
E cient automatic model-checking algorithms for real-time systems have been obtained in recent years based on the state-region graph technique of Alur, Courcoubetis and Dill. Howe...
134
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VLDB
1995
ACM
15 years 10 months ago
1995
ACM
We provide several new sampling-based estimators of the number of distinct values of an attribute in a relation. We compare these new estimators to estimators from the database an...
161
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ICDE
1987
IEEE
15 years 10 months ago
1987
IEEE
Handling parallelism in database systems involves the specification of a storage model, a placement strategy, and a query processing strategy. An important goal is to determine th...