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TCAD
2008
136views more  TCAD 2008»
15 years 6 months ago
A Geometric Programming-Based Worst Case Gate Sizing Method Incorporating Spatial Correlation
We present an efficient optimization scheme for gate sizing in the presence of process variations. Our method is a worst-case design scheme, but it reduces the pessimism involved i...
Jaskirat Singh, Zhi-Quan Luo, Sachin S. Sapatnekar
EC
2000
187views ECommerce» more  EC 2000»
15 years 6 months ago
Comparison of Multiobjective Evolutionary Algorithms: Empirical Results
In this paper, we provide a systematic comparison of various evolutionary approaches to multiobjective optimization using six carefully chosen test functions. Each test function i...
Eckart Zitzler, Kalyanmoy Deb, Lothar Thiele
TCAD
2008
127views more  TCAD 2008»
15 years 6 months ago
Speculative Loop-Pipelining in Binary Translation for Hardware Acceleration
Abstract--Multimedia and DSP applications have several computationally intensive kernels which are often offloaded and accelerated by application-specific hardware. This paper pres...
Sejong Oh, Tag Gon Kim, Jeonghun Cho, Elaheh Bozor...
ICCV
2003
IEEE
16 years 8 months ago
Object Recognition with Informative Features and Linear Classification
In this paper we show that efficient object recognition can be obtained by combining informative features with linear classification. The results demonstrate the superiority of in...
Michel Vidal-Naquet, Shimon Ullman
DAC
2005
ACM
16 years 7 months ago
System-level energy-efficient dynamic task scheduling
Dynamic voltage scaling (DVS) is a well-known low power design technique that reduces the processor energy by slowing down the DVS processor and stretching the task execution time...
Jianli Zhuo, Chaitali Chakrabarti